Along with the trend for high integration of a semiconductor device, a wiring width or an isolation width required for a manufacturing process thereof is being reduced. In general, formation of a micro pattern involves forming a resist pattern by using a photolithography technique; and then etching various kinds of underlying thin films by using the resist pattern as an etching mask.
To form the micro pattern, the photolithography technique is important. However, the recent miniaturization of the semiconductor device has progressed to the extent that a dimension no greater than a resolution limit of the photolithography technique is required.
An example technique for forming the pattern no greater than the resolution limit is disclosed in Patent Document 1. The technique of Patent Document 1 basically involves the steps of forming a silicon nitride film (hereinafter, referred to as “sacrificial film”) on an underlying film at an interval equivalent to the resolution limit; forming a sidewall silicon oxide film (hereinafter, referred to as “sidewall spacer”) on the sidewall of the sacrificial film; removing the sacrificial film while leaving the sidewall spacer; and etching the underlying film by using the remaining sidewall spacer as an etching mask.
According to this technique, since the width of the sidewall spacer can be reduced thinner than that of the sacrificial film, it is possible to form a pattern of the underlying film having a width no greater than the resolution limit by using the sidewall spacer as the etching mask.
Patent Document 1: Japanese Patent Laid-open Publication No. 2000-173979